This invention relates generally to packages with a tall aspect ratio, such as vertical surface mount packages (“VSMP”), for integrated circuits and particularly, to techniques for supporting those structures.
In a variety of computer applications it is desired to reduce bus lengths to enable higher operating frequencies. For example, a number of memory and other devices may be connected to a bus in a computer system. The more space the devices take, generally the longer the bus length. The longer bus length normally adds resistance and capacitance which may be adverse to achieving higher bus operating frequencies. By mounting the devices on edge, the devices may be packed more closely, reducing bus lengths and making possible higher bus operating frequencies.
Because VSMP technology involves positioning the packages in an on-edge vertical alignment, the devices have considerable moment arms about their points of connection to the printed circuit board (“PCB”) or card. The VSMP is generally supported on a pair of L-shaped leads and may have no other connection to the PCB or card.
Although the VSMP package improves signal integrity at high frequencies by minimizing the bus length, the VSMP packages may be prone to a variety of stress and vibration induced failures because of their on-edge orientation. Thus, it would be desirable to have a way to provide tall aspect ratio packages which are more resistant to mechanical failures.